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N-CHANNEL 30V - 0.008 - 70A D2PAK LOW GATE CHARGE STripFETTM POWER MOSFET
PRELIMINARY DATA TYPE STB70NF3LL
s s s s
STB70NF3LL
VDSS 30 V
RDS(on) <0.01
ID 70 A
TYPICAL RDS(on) = 0.01 @ 4.5 V OPTIMAL RDS(on) x Qg TRADE-OFF @ 4.5 V CONDUCTION LOSSES REDUCED SWITCHING LOSSES REDUCED
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DESCRIPTION
This application specific Power Mosfet is the third generation of STMicroelectronics unique "Single Feature SizeTM" strip-based process. The resulting transistor shows the best trade-off between on-resistance and gate charge. When used as high and low side in buck regulators, it gives the best performance in terms of both conduction and switching losses. This is extremely important for motherboards where fast switching and high efficiency are of paramount importance.
D2PAK TO-263 (suffix"T4")
ADD SUFFIX "T4" FOR ORDERING IN TAPE & REEL
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS s SPECIFICALLY DESIGNED AND OPTIMISED FOR HIGH EFFICIENCY CPU CORE DC/DC CONVERTERS
ABSOLUTE MAXIMUM RATINGS
Symbol VDS VDGR VGS ID ID IDM(*) Ptot Tstg Tj Parameter Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 k) Gate- source Voltage Drain Current (continuos) at TC = 25C Drain Current (continuos) at TC = 100C Drain Current (pulsed) Total Dissipation at TC = 25C Derating Factor Storage Temperature Max. Operating Junction Temperature Value 30 30 16 70 50 280 100 0.67 -65 to 175 175 Unit V V V A A A W W/C C C
(*)Pulse width limited by safe operating area
September 2001
This is pr eliminary dat a new product in developm ent or unde rgoing evaluation. Det ails are subject to change wit hout notce. i
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STB70NF3LL
THERMAL DATA
Rthj-case Rthj-amb Tj Thermal Resistance Junction-case Max Thermal Resistance Junction-ambient Max Maximum Lead Temperature For Soldering Purpose Max Max 1.5 62.5 300 C/W C/W C
ELECTRICAL CHARACTERISTICS (Tcase = 25 C unless otherwise specified) OFF
Symbol V(BR)DSS IDSS IGSS Parameter Drain-source Breakdown Voltage Zero Gate Voltage Drain Current (VGS = 0) Gate-body Leakage Current (VDS = 0) Test Conditions ID = 250 A VGS = 0 Min. 30 1 10 100 Typ. Max. Unit V A A nA
VDS = Max Rating VDS = Max Rating, TC = 125 C VGS = 16 V
ON (*)
Symbol VGS(th) RDS(on) ID(on) Parameter Gate Threshold Voltage Static Drain-source On Resistance On State Drain Current Test Conditions VDS = VGS VGS = 10 V VGS = 4.5 V ID = 250 A ID = 35 A ID = 18 A 70 Min. 1 0.008 0.01 Typ. Max. 2.5 0.01 0.012 Unit V A
VDS > ID(on) x RDS(on)max VGS = 10 V
DYNAMIC
Symbol gfs
(*)
Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitances
Test Conditions VDS > ID(on) x RDS(on)max ID=35 A VDS = 25V f = 1 MHz VGS = 0
Min.
Typ. 40 1700 500 115
Max.
Unit S pF pF pF
Ciss Coss Crss
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STB70NF3LL
ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON
Symbol td(on) tr Qg Qgs Qgd Parameter Turn-on Delay Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Conditions VDD = 15 V ID = 35 A VGS = 4.5 V RG = 4.7 (see test circuit, Figure 3) VDD= 24 V ID= 70 A VGS=10 V Min. Typ. 20 350 43 10 10 56 Max. Unit ns ns nC nC nC
SWITCHING OFF
Symbol td(off) tf Parameter Turn-off Delay Time Fall Time Test Conditions VDD = 15 V ID = 35 A VGS = 4.5 V RG = 4.7 (Resistive Load, see fig.3) Min. Typ. 35 65 Max. Unit ns ns
SOURCE DRAIN DIODE
Symbol ISD ISDM(*) VSD (*) trr Qrr IRRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 70 A VGS = 0 40 52 2.4 Test Conditions Min. Typ. Max. 70 280 1.5 Unit A A V ns nC A
ISD =70 A di/dt = 100 A/s Tj = 150 C VDD = 15 V (see test circuit, Figure 5)
(*)Pulsed: Pulse duration = 300 s, duty cycle 1.5 %. (*)Pulse width limited by safe operating area.
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STB70NF3LL
Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuits For Resistive Load
Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times
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STB70NF3LL
D2PAK MECHANICAL DATA
DIM. A A1 A2 B B2 C C2 D D1 E E1 G L L2 L3 M R V2
mm. MIN. 4.4 2.49 0.03 0.7 1.14 0.45 1.23 8.95 8 10 8.5 4.88 15 1.27 1.4 2.4 0.4 0 8 5.28 15.85 1.4 1.75 3.2 0.192 0.590 0.050 0.055 0.094 10.4 0.393 TYP MAX. 4.6 2.69 0.23 0.93 1.7 0.6 1.36 9.35 MIN. 0.173 0.098 0.001 0.027 0.044 0.017 0.048 0.352
inch TYP. MAX. 0.181 0.106 0.009 0.036 0.067 0.023 0.053 0.368 0.315 0.334 0.208 0.625 0.055 0.068 0.126 0.015
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STB70NF3LL
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is registered trademark of STMicroelectronics (c) 2000 STMicroelectronics - All Rights Reserved All other names are the property of their respective owners. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com
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